1. Field of the Invention
This invention relates generally to electronic circuits for use in microprocessors, and relates more particularly to an improved strobe line driver circuit.
2. Description of the Prior Art
Microprocessors commonly utilize strobe circuits to control internal data transfer. A microprocessor might have, for example, a thirty-two bit data bus and twenty temporary storage registers (each thirty-two bits wide). The temporary storage registers would be used for accumulating and temporarily storing data for transfer to the data bus. According to standard design practices, each register would be coupled to the data bus using thirty-two pull down transistors, one for each of the thirty-two lines of the data bus. Data transfer from a register to the data bus would be triggered by a strobe signal supplied to the pull down transistors. Such a microprocessor would require twenty strobe lines, each for triggering a specific register. The microprocessor would also require means for generating twenty separate strobe signals, each capable of driving thirty-two pull down transistors.
The timing of the strobe signals is defined by a system clock to ensure that the transfer of data occurs in an orderly fashion. The transfer of data to the data bus requires several steps: (1) data is stored in a register, (2) the data bus is precharged to a logic high voltage, (3) a corresponding strobe signal is supplied to the pull down transistors, and (4) the charge on the data bus is discharged to ground through the pull down transistors according to the data bits stored in the register. The timing of the strobe signals is critical. The strobe signals must be supplied to the pull down transistors after the data has been stored in the register and the data bus has been precharged. The duration of the strobe signals must be sufficient to allow the pre-charged data bus to discharge through the pull down transistors.
In addition to controlling the timing of the data transfer, the strobe signals also select registers for data transfer. Typically, a series of mutually exclusive enable signals are combined with a clock signal to generate the strobe signals. Each enable signal corresponds to a specific strobe signal and register. The enable signals determine which strobe signal is to be activated, and the clock signal determines the exact timing of the strobe signal.
An example of a prior art strobe line driver circuit is illustrated in FIG. 1. The strobe line driver circuit includes X groups of three transistors, where X equals the total number of strobe lines (X also equals the number of registers). In the example above, X is equal to twenty. Each group of three transistors is connected to a clock line and a positive voltage supply, Vcc. Each group of three transistors receives one enable signal, ENABLE-1-BAR for example, and generates one strobe signal, STROBE-1 for example.
In FIG. 1, transistors Qa, Qb, and Qc form one such group of three transistors. Transistors Qa and Qb are both p-channel enhancement-mode metal-oxide-semiconductor field effect transistors (MOSFETs), while transistor Qc is an n-channel enhancement-mode MOSFET. Transistor Qa has its source connected to Vcc, and has its drain connected to the source of transistor Qb. The gates of transistors Qb and Qc are connected to the clock line, while the drains of transistors Qb and Qc are connected together. The source of transistor Qc is grounded. The clock line carries a clock signal, CLOCK-BAR. An enable signal, ENABLE-1-BAR, is supplied to the gate of transistor Qa. A strobe signal, STROBE-1, is generated at the commonly connected drains of transistors Qb and Qc.
Transistors Qa, Qb, and Qc generate a strobe signal in response to the clock signal and an enable signal. The strobe signals are normally held at a logic low voltage. When a transfer of data is desired, the strobe signal pulses to a logic high voltage for one half clock period, and then returns to the logic low voltage. Transistors Qa and Qb form a NOR gate that defines the positive-going transition of the strobe signal. ENABLE-1-BAR is normally at the logic high voltage (disabled). The clock signal alternates between the logic low voltage and the logic high voltage. When ENABLE-1-BAR goes to the logic low voltage (enabled), transistor Qa changes to a fully conductive state (on). When the clock signal next goes to the logic low voltage, transistor Qb also changes to a fully conductive state (on), passing Vcc to the strobe line. Thus, when both transistors Qa and Qb are on, the strobe signal is at the logic high voltage.
The strobe signal remains at the logic high voltage until the clock signal rises to the logic high voltage one half clock period later. When the clock signal rises to logic high, transistor Qb is turned off and transistor Qc is turned on. Since transistor Qc provides a path to ground for the charge on the strobe line, the strobe signal falls to the logic low voltage (ground potential). Transistor Qc and the clock signal thus define the negative-going transition of the strobe signal. The strobe signal remains at the logic low voltage until both ENABLE-1-BAR and CLOCK-BAR are again logic low.
The strobe line driver circuit of FIG. 1 has certain limitations. A major limitation is that of speed. P-channel transistors Qa and Qb must have a large enough capacity in series to drive thirty-two pull down transistors, assuming a thirty-two bit data bus. The clock line must drive X of the p-channel transistors, such as Qb and Qe, where X equals the number of strobe lines. In addition, the clock line must drive X of the n-channel transistors, such as transistors Qc and Qf. To drive such a large load on the clock line, either a large driver must be used, or the clock rate must be restricted. Using a large clock driver device is undesirable because it would occupy a large chip area and require too much power. Using a slower clock is undesirable since the clock speed determines the operational speed and information processing capability of the microprocessor.
Another limitation of the strobe line driver circuit of FIG. 1 is that of device count and chip area. Since the circuit requires three transistors for each strobe line, a total of 3X transistors is required to support X registers. Further, the p-channel transistors are larger than the n-channel transistors, due to beta requirements associated with p-substrate type integrated circuits. Large current requirements, as well as the high device count and correspondingly high chip area of this prior art strobe line driver circuit makes it costly to use in high capacity microprocessors.
What is needed, then, is an improved strobe line driver circuit that can be effectively used in smaller, faster, and more power efficient microprocessors.